Branch prediction, Branch history table BHT, Branch Target Buffer, Computer Architecture Lec 23 / 30
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VLIW processors, Loop unrolling, Software Pipelining, Computer Architecture Lec 24 / 30
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Synchronization, TSO, Locks, Test&Set, Ld-reserve St-conditional, Computer Architecture Lec 29 / 29
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Complex In order pipelines, Supercomputers, CDC6600, MIPS R4000, Computer Architecture Lec 11 / 30
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